Artificial Intelligence (AI) Hardware Acceleration (with beyond-CMOS technologies)
Providing efficient computational systems to meet the growing demands from processing machine learning (ML) and artificial intelligence (AI) tasks presents exciting opportunities for research across the computational stack from Hardware to Algorithm. I would like to investigate how to enable energy-efficient and robust AI through a co-design approach involving device, circuit, architecture, and algorithms.
Major thrusts include, but not limited to:
Device-architecture-algorithm co-optimization of in-memory computing systems
Integration and optimization of emerging memory technologies for application-specific architecture (such as systolic arrays)
Error-aware hardware accelerator design with optimization for both efficiency and robustness.
Efficiency-Centric AI Algorithms and Systems
The edge of large-scale DNNs such as large language models (LLMs) presents an unprecedented challenge for the underlying computing systems. Truly democratizing AI requires scalable and effective methods for designing highly efficient AI algorithms and systems. The enhanced awareness of efficiency in AI development offers rich potential for system-level improvement.
Major thrusts include, but not limited to:
Scalable and efficiency-aware sparsification, quantization (both element-wise and vector-wise), and rank reduction.
Innovative mapping and adjustment of large-scale AI workloads on emerging hardware architecture.
Hardware-aware neural network architecture search and optimization.
Neuromorphic Computing and Brain-Inspired Computational Models
At present, researchers in ML and neuromorphic communities are striving to meet the challenge of building intelligent electronic hardware that can reach brain-like cognitive abilities with a similar level of efficiency and robustness. I am interested in gaining inspirations from the biological systems towards developing better systems for processing complex cognitive tasks. While deep neural networks have demonstrated remarkable success, I am interested in exploring various computational models that may achieve improvements in efficiency, robustness, and explanability. Since conventional CMOS gates are not designed for such types of AI workloads, I will explore hardware implementations of neuromorphic computing with diverse device/material technologies.
Major thrusts include but not limited to:
Developing efficient and robust spiking neural networks for various AI tasks (vision and language)
Exploration of unconventional computational models such as oscillatory activation and stochastic computing
Leveraging emerging device physics to provide highly efficient neuromorphic functionality
Nanoelectronics and Spintronics for Efficient AI
As AI model size and amount of data being processed grow exponentially over the recent years, the urge of developing efficient AI is stronger than ever. The exciting development in beyond-CMOS devices and materials provide us a gold mine for prototyping novel AI hardware. However, it remains to be seen that if any of the novel technologies can deliver the next giant leap in hardware technology. Meanwhile, the rich dynamics in various nano-scale systems may also give us inspirations for representing and processing information.
Interested directions:
Searching for new mechanisms in nano-electronic and nano-magnetic devices for efficient building blocks in AI computation
Enabling cross fertilization between hardware technologies and intelligent algorithms